Support at 01:14, 20 June 2010

Support — Sun, 20 Jun 2010 01:14:26 GMT

← Older revision		Revision as of 01:14, 20 June 2010
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-	~~__TOC__~~
	=Interrupts (interrupts)=		=Interrupts (interrupts)=
-	==Compatibility [http://www.micromint.com/index.php/SBC/eagle-50.html ~~Eagle50~~], [http://www.micromint.com/index.php/SBC/eagle-50.html 50E], [http://www.micromint.com/index.php/SBC/eagle-100.html 100]==	+	==Compatibility [http://www.micromint.com/index.php/SBC/eagle-50.html Eagle 50], [http://www.micromint.com/index.php/SBC/eagle-50.html 50E], [http://www.micromint.com/index.php/SBC/eagle-100.html 100]==
	This example application demonstrates the interrupt preemption and tail-chaining capabilities of Cortex-M3 microprocessor and NVIC. Nested interrupts are synthesized when the interrupts have the same priority, increasing priorities, and decreasing priorities. With increasing priorities, preemption will occur; in the other two cases tail-chaining will occur. The currently pending interrupts and the currently executing interrupt will be displayed on the OLED; GPIO pins B0, B1 and B2 will be asserted upon interrupt handler entry and de-asserted before interrupt handler exit so that the off-to-on time can be observed with a scope or logic analyzer to see the speed of tail-chaining (for the two cases where tail-chaining is occurring).		This example application demonstrates the interrupt preemption and tail-chaining capabilities of Cortex-M3 microprocessor and NVIC. Nested interrupts are synthesized when the interrupts have the same priority, increasing priorities, and decreasing priorities. With increasing priorities, preemption will occur; in the other two cases tail-chaining will occur. The currently pending interrupts and the currently executing interrupt will be displayed on the OLED; GPIO pins B0, B1 and B2 will be asserted upon interrupt handler entry and de-asserted before interrupt handler exit so that the off-to-on time can be observed with a scope or logic analyzer to see the speed of tail-chaining (for the two cases where tail-chaining is occurring).


	[[Image:Eagle_interrupts.gif\|center\|]]		[[Image:Eagle_interrupts.gif\|center\|]]

Support: Created page with 'TOC =Interrupts (interrupts)= ==Compatibility [http://www.micromint.com/index.php/SBC/eagle-50.html Eagle50], [http://www.micromint.com/index.php/SBC/eagle-50.html 50E], [htt…'

Support — Thu, 17 Jun 2010 17:14:44 GMT

Created page with '__TOC__ =Interrupts (interrupts)= ==Compatibility [http://www.micromint.com/index.php/SBC/eagle-50.html Eagle50], [http://www.micromint.com/index.php/SBC/eagle-50.html 50E], [htt…'

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__TOC__
=Interrupts (interrupts)=
==Compatibility [http://www.micromint.com/index.php/SBC/eagle-50.html Eagle50], [http://www.micromint.com/index.php/SBC/eagle-50.html 50E], [http://www.micromint.com/index.php/SBC/eagle-100.html 100]==
This example application demonstrates the interrupt preemption and tail-chaining capabilities of Cortex-M3 microprocessor and NVIC. Nested interrupts are synthesized when the interrupts have the same priority, increasing priorities, and decreasing priorities. With increasing priorities, preemption will occur; in the other two cases tail-chaining will occur. The currently pending interrupts and the currently executing interrupt will be displayed on the OLED; GPIO pins B0, B1 and B2 will be asserted upon interrupt handler entry and de-asserted before interrupt handler exit so that the off-to-on time can be observed with a scope or logic analyzer to see the speed of tail-chaining (for the two cases where tail-chaining is occurring).

[[Image:Eagle_interrupts.gif|center|]]

Eagle interrupts Example - Revision history

Support at 01:14, 20 June 2010

Support: Created page with '__TOC__ =Interrupts (interrupts)= ==Compatibility [http://www.micromint.com/index.php/SBC/eagle-50.html Eagle50], [http://www.micromint.com/index.php/SBC/eagle-50.html 50E], [htt…'

Support: Created page with 'TOC =Interrupts (interrupts)= ==Compatibility [http://www.micromint.com/index.php/SBC/eagle-50.html Eagle50], [http://www.micromint.com/index.php/SBC/eagle-50.html 50E], [htt…'